Cheering Capex, Missing the Wafer
Nasdaq is up 11.6% month-to-date (through the 4-16 close). The semiconductor complex got dragged up with it, and the dominant narrative snapped back to “the AI capex cycle still has legs.”
Another dataset says the opposite.
SemiAnalysis’s late-March research puts a hard number on it: roughly 60% of TSMC’s N3 wafer output in 2026 is earmarked for AI customers (Nvidia, Broadcom, Google, AWS). By 2027, that share climbs to 86% (SemiAnalysis “The Great AI Silicon Shortage”, 2026-03-12).
Do the arithmetic. Phones, PCs, cars, the entire rest of consumer electronics — they share 14% of leading-edge TSMC capacity.
AI’s ceiling is moving from the wallet to the wafer.
N3 Is the New Kingmaker
The bottleneck in this AI infrastructure build has migrated.
In 2024 it was CoWoS. TSMC scrambled to add advanced packaging capacity, Amkor and ASE expanded behind them, and by late 2025 the back-end pressure had largely released. Markets assumed HBM would be next, but Samsung and Hynix are actively adding fab, and EUV tool deliveries have held schedule.
The real physical constraint is one layer further upstream — N3 wafer itself.
Blackwell, Blackwell Ultra, and Rubin all sit on N3. Each generation adds roughly 50% HBM capacity per accelerator, and Rubin Ultra adds another ~4x on top of that (SemiAnalysis “The Great AI Silicon Shortage”, 2026-03-12). Every new AI die ships with taller and thicker HBM stacks.
And HBM is where the math gets ugly.
HBM is not commodity DRAM. The same SemiAnalysis research hammers on an overlooked multiplier: a bit of HBM consumes roughly 3x the wafer area of commodity DRAM, and the HBM4 transition may push that toward 4x (SemiAnalysis “The Great AI Silicon Shortage”, 2026-03-12). Every 1GB of HBM capacity added eats 3-4x the wafer of the same gigabyte in a standard DDR5 module.
So when Nvidia telegraphs a 4x jump in Rubin Ultra HBM, the supply side doesn’t read “4x.” It reads 4 × 4 = 16x of pressure on the memory wafer pool.
Anthropic added $6B of ARR in February alone, driven by Claude Code (cited in SemiAnalysis, March 12, 2026). Their internal framing is explicit: “if we had more compute, we could serve more inference.” Demand is not the constraint. Capital is not the constraint. Silicon is.
Chinese Equities Are Already Pricing It
If this supply story is real, it should show up first in the valuation of the upstream — memory-interface IP, domestic foundry, equipment, semi capital goods.
Look at the last two weeks of A-share data:
- DDR5 and CXL interface IP: up roughly +18% from 2026-04-07 to 04-17. Direct ecosystem beneficiary of HBM buildout.
- Domestic foundry: up about +10% over the same window. The only local capacity that can absorb any consumer-side spillover from TSMC’s AI squeeze.
- Memory interface and NOR flash: up roughly +16%. An indirect AI-edge play.
- Domestic semiconductor equipment: up about +11%. The picks-and-shovels exposure for any HBM expansion.
(Data: Eastmoney Choice, pulled 2026-04-17)
That’s not broad sector beta. The SSE and SZSE headline indices were roughly flat over the same window, meaning capital was rotating into this specific pocket rather than riding a general risk-on tape.
Meanwhile TSMC closed at $379.89 on 2026-04-14 and $363.35 on 2026-04-16 — down 4.4% over two sessions (Eastmoney Choice, 2026-04-17). The divergence is worth sitting with. A-shares are buying the beneficiaries of the constraint; US investors are marking down TSMC on whether it can actually deliver. Two markets, same N3 capacity table, reading opposite sides of the ledger.
The Bull Rebuttal
A committed AI bull would push back three ways:
- Demand reroutes. If N3 is tight, Nvidia can push SKUs to N2 or A16. TSMC already has the next node scheduled for H2 2027. Move the timeline, solve the shortage.
- HBM supply is expanding. Samsung, Hynix, and Micron are all racing on HBM4. Capacity ramps, bottleneck temporary.
- Capex is the cure. A large chunk of this AI capex cycle funds new fabs — TSMC’s Arizona, Kumamoto, and Kaohsiung lines come online through 2026-2027. More wafer is coming.
All reasonable. All miss a layer.
Time mismatch. AI model generations ship quarterly. Fab capacity expansions run on multi-year timelines. Nvidia needs to ship Rubin in H2, but Arizona Fab 21’s N3 capacity doesn’t fully ramp until 2027. You can’t fill the 18-month gap with “more capacity later.”
N3 is the only node that runs the top SKUs. Dropping to N5 or N4 costs die area, power, and perf-per-watt. Same data center, same workload — but now you need more dies, more racks, more megawatts, more cooling. Capex doesn’t shrink. It grows. But the compute curve flattens.
Which is the quiet point: more capex does not mean more compute. That’s the pin in the bull thesis that SemiAnalysis surfaced and the equity-side narrative hasn’t digested.
Closing
The “AI capex is doubling again” story treats money as the medicine.
But if the real ceiling is N3 wafer and HBM physical supply, then every incremental capex dollar is chasing the same finite pool of silicon. The market’s implicit transmission coefficient — from dollars to FLOPs — is probably materially less than one.
That’s not being priced yet. The US complex is debating the size of capex; A-shares are already trading the supply constraint. Two markets looking at the same N3 capacity table are reading different conclusions. Which side gets falsified first is the real Q2 question.
What to Watch
Framework, not trade signals.
- TSMC Q2 HPC revenue mix: FY 2025 HPC share landed at 58% (Q4 single quarter at 55%). A Q2 print above 60% would confirm the AI-consumer wafer squeeze is accelerating.
- SK Hynix and Samsung HBM4 yield disclosures: every 5 percentage points of yield gain roughly frees ~10% of the equivalent N3 wafer pressure.
- Apple’s node choice for M-series: if the iPhone 17 Pro slips from N3P to N3E, that’s the clearest single data point that AI is crowding out consumer allocation at TSMC.
- Divergence within A-share semis: whether domestic equipment names continue to outperform consumer IC design names. The wider the gap, the more grounded the supply-constraint thesis.
Data sources: Supply-side analysis from SemiAnalysis “The Great AI Silicon Shortage” (2026-03-12). TSMC HPC revenue mix from Futurum Group / TSMC Q4 FY 2025 Results. A-share and TSMC equity data from Eastmoney Choice (pulled 2026-04-17).